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    Modeling of high permittivity insulator structure with interface charge by charge compensation

    2022-02-24 08:59:28ZhiGangWang汪志剛YunFengGong龔云峰andZhuangLiu劉壯
    Chinese Physics B 2022年2期

    Zhi-Gang Wang(汪志剛), Yun-Feng Gong(龔云峰), and Zhuang Liu(劉壯)

    School of Information Science and Technology,Southwest Jiao Tong University,Chengdu 611756,China

    An analytical model of the power metal–oxide–semiconductor field-effect transistor(MOSFET)with high permittivity insulator structure(HKMOS)with interface charge is established based on superposition and developed for optimization by charge compensation. In light of charge compensation,the disturbance aroused by interface charge is efficiently compromised by introducing extra charge for maximizing breakdown voltage (BV) and minimizing specific ON-resistance(Ron,sp). From this optimization method, it is very efficient to obtain the design parameters to overcome the difficulty in implementing the Ron,sp–BV trade-off for quick design. The analytical results prove that in the HKMOS with positive or negative interface charge at a given length of drift region,the extraction of the parameters is qualitatively and quantitatively optimized for trading off BV and Ron,sp with JFET effect taken into account.

    Keywords: charge compensation,breakdown voltage,high permittivity,interface charge,super-junction

    1. Introduction

    Today,the power metal–oxide–semiconductor field-effect transistor (MOSFET) with high permittivity insulator structure(HKMOS)as a prospective power semiconductor switching has excellent advantages for applications in the low and medium power field.[1–4]The high permittivity (HK)pillar introduced into power MOSFET has no problem of charge imbalance potentially and replaces the superjunction(SJ), thereby optimizing the trade-off between specific ONresistance (Ron,sp) and breakdown voltage (BV) of power MOSFETs.[5,6]However, the existence of interface charge at the hetero-interface between HK pillar and silicon pillar is unavoidable, resulting in pre-avalanche breakdown.[7–9]Therefore, the quick designing ofBVandRon,sp, which is dependent not only on drift region doping concentration, but also on interface charge,becomes a complex work to facilitate the optimization.[10–13]Owing to material-dependent HK pillar,BV2/Ron,spregarded as the figure of merit gives a useful insight into the assessment of compromisingBV–Ron,sp.[14,15]AlthoughBVvaries in a range of?8.1%–5.3%with unintentional penalty inRon,spincrement affected by HK pillar,[16,17]in the case of HKMOS with interface charge, theBV–Ron,sptrade-off becomes difficult to account for.

    In this paper, the HKMOS with interface charge evolves into the HKMOS with charge-compensation region(C2HKMOS). The charge-compensation (CC) region introduced in C2HKMOS is exploited to compensate for the influence of interface charge. This CC mechanism is also detailed analytically forRon,sp–BVoptimization.

    2. Charge compensation mechanism

    Figure 1 shows a cross-sectional cell unit of a C2HKMOS device. At the top of the device,it is the source region,and at the bottom, it is the drain region. In the middle, the silicon drift region is connected in parallel with an HK region with a dielectric constantεhk(εhk=krεsi,εsiis the permittivity of silicon) and a width ofwK. The whole drift region with the width ofwNand the length ofLDconsists of two parts: Ntype drift region on the left and CC region with a width ofwCCon the right. Specially,fixed charge(viz)and interface charge(Qit) exist at the hetero-interface between HK pillar and drift region. Figure 1(b)shows that the electric field displacement is absorbed by negativeQit,and figure 1(c)demonstrates that the electric field displacement is repelled by positiveQit.

    Fig. 1. Schematic digram of (a) C2HKMOS, (b) CC region with N-type doping compensation,and(c)CC region with P-type doping compensation.

    Based on superposition methodology,[10]the equivalent C2HKMOS under the reverse-voltage sustained condition issimply superposed by non-compensation CC region and extracharge compensation CC region as shown in Fig. 2(a). The corresponding potential distributionVCC(x,y)is equal to noncompensation potential(VNC)plus extra-charge compensation potential(VEC),i.e.,VCC(x,y)=VNC(x,y)+VEC(x,y). Derivation from solving Poisson equation,VNC(x,y) is the noncompensation potential given as

    whereKn=nπ/LD;A1,A2,A3,andA4are given in Eqs.(A1),(A4),(A7),and(A10)in Appendix A,respectively.Vit(x,y)is the potential yielded by theQitand expressed as

    whereCit,mnandNit,mare calculated from Eqs. (A13) and(A16)in Appendix A.

    Figure 2(b)shows that in the non-compensation structure with negativeQit, the concentration of N-type drift region isNNCand its quantity isQNC=qNNCwN. In extra-charge compensation region, the additional charge concentrationNECis of N-type and its quantity is ΔQEC=qNECwCC. In order to achieve a uniform distribution of electric displacement in noncompensation region as shown in Fig. 2(c), ΔQECis superposed overQNCas a CC structure,which compensates for the disturbance of electric displacement aroused byQitto be horizontal in HK pillar. Intuitively,the N-type dope ofNECcompensates for the negativeQitfrom Fig. 1(b), and P-type dope ofNECcompensates for the positive one from Fig. 1(c). A positiveNCCrepresents the ionized N-type CC region, and a negativeNCCrepresents the ionized P-type CC region. The extra charge yieldsVEC(x,y)distribution as

    whereA1,CC,A2,CC, andA3,CCare given in Appendix (A3),(A6),and(A9)in Append A,respectively.

    Owing to the fixed charge existing at hetero-interface between silicon pillar and HK pillar, the horizontal electric displacement is discontinuous atx=0 as shown in Fig.2(c). Atx=0, the horizontal electric displacement is discontinuous.The difference in electric displacement betweenx=0+andx=0?satisfiesDx(x=0+)?Dx(x=0?)=Qit. The horizontal electric displacementDx,CC(x,y)is superposed by noncompensation one-Dx,NC(x,y)and extra-charge compensated one-Dx,EC(x,y)given as

    In light of Eq.(1),Dx,NC(x,y)is expressed as

    According to Eq.(1),Dx,EC(x,y)is obtained as

    It is obviously found from Fig. 2(c) that the electric displacement yielded by extra-charge can offset the electric displacement yielded by non-compensation in HK region to uniform electric field in Fig.2(d).After compensation,Dx(x,y)in HK region equals zero. In order to verify this mechanism,figure 3 shows the verification of the horizontal electric displacement along lineM1–M–M2aty=LD/2. In the conventional HKMOS(CHKMOS)withoutQit,theDxaty=LD/2 demonstrates a triangle distribution and theDxpeak appears at pointM. Nonetheless, in the CHKMOS with negativeQit, a negativeDxpeak is atx=0?and a positive one is atx=0+due to the existence ofQit. As shown in Fig.3(a),the negativeQit(Nit=?1.0×1012cm?2) results inDx(0+)<0. The extracharge in CC region is presened by ionized donor, and thecharge density isNEC=3.33×1015cm?3. After imbedding CC region into C2HKMOS, the electric displacement in the HK is modified into being horizontal.Conversely,in Fig.3(b),C2HKMOS with the positiveQit(Nit=1.0×1012cm?2) results inDx(0+)>0. The extra-charge in P-type CC region is ionized acceptor, and its density isNEC=?1.5×1016cm?3to flatten the electric displacement to zero in HK pillar.

    Assuming thatDx(0+)=0, the extra-charge concentrationNECreaches the optimal value to guarantee an uniform electric field alongas schematically shown in Fig.2(d)and verified in Fig.3. Derived from the formula(6),the optimalNECis

    where the coefficientsαandβare given as

    Fig. 2. Superposition method used in deriving electric displacement of C2HKMOS: (a) schematic equivalent diagram of C2HKMOS by superposition, (b) equivalent charge concentration, (c) compensation of electric displacement, and (d) superposition of the electric field. In panel(a),the CC structure is split into a non-compensation one and extra-charge compensation one.After compensation,the horizontal electric displacement in HK pillar is modulated to be zero in panel(c)and electric field distributes uniformly along X1– in panel(d).

    Fig. 3. Dx along line M1–M–M2: (a) compensation for negative Qit with Nit =?1.0×1012 cm?2 and (b) compensation for positive Qit with Nit =1.0×1012 cm?2. At the hetero-interface in panels(a)and(b),the fixed Qit results in abrupt change of electric displacement,and ionized charge in CC region can change electric displacement into being horizontal in HK pillar.The abbreviations“w”and“w/o”in the figure express“with”an“without”,respectively.

    where parameterKn=nπ/LD,Nitis theQitdensity, parameterA3,NandA3,CCare shown in Eqs. (A8) and (A9) of Appendix A.

    In the C2HKMOS, according to Gauss law,[18]the flux integral of the electric displacement along close pathis

    There is no doubt that in Eq.(12)the right term equal to zero causes the left term to appear in the form of symmetric distribution, similar to superjuction or PIN diode. As indicated in Fig. 2(d), the optimized electric field needs to be as close to the ideal PIN diode as possible to maximizeBV.It implies that the uniformD(x,y)along the lineand the linewithDx(x,y)=0 is illustrated atx=±4μm in Fig.3.Hence,the limited condition is simplified from Eq.(9)into

    It is worth pointing out that using the numerical calculation,the value ofβis approximately 1,i.e.,β ≈1 with a deviation<1%after electric-displacement compensation. From Fig.4, it is available thatαdemonstrates a linear function ofwCCand can be expressed approximately asα ≈wCC/wN.Equation (13) implies an approximation of charge-balance condition for contracting electric flux to attainDx(0+)=0.Note that extra charge satisfies Eq. (13) with little influence fromkrandLD.

    Fig.4. Curves of α versus wCC for kr=10 and wN=4,6,8μm,indicating that α varies linearly with wCC.

    3. Optimization of breakdown voltage

    In the C2HKMOS, the electric displacement along the lineis derived from Eq.(1)as

    After compensation, the whole drift region is under punch-through and the avalanche breakdown location retains at pointX1. At this location,the electric displacement is

    whereD0=εsiVB/LDandDEC(x,y) donates the additional electric displacement caused by the compensation chargeNEC.At avalanche breakdown,the electric displacement along lineis approximated by

    where,λ=D2/D0,ζ=D2/(εsiNNC), andD2=D1(?wN,0)+DEC(?wN,0). From Fulop’s model,[19]ionization integral inD(y)form is×1049D(?wN,y)7dy=1. SubmittingD(?wN,y)into ionization integral,we find that

    whereξ=ζ ·F(λ)/840, andF(λ) =λ(2940+λ(4410+λ(4900+λ(3675+2λ(882+5λ(49+6λ)))))). InF(λ),λ=0 is obtained in the ideal PIN diode. TheBVof ideal PIN diode is recorded asBVPIN.[9,10]So assumingλ=0, equation(17)becomes

    Considering the case in Eq.(18)and eliminatingLD,the normalized factorη=BV/BVPINis calculated by

    For the ideal PIN diode,η=1 substituted into Eq.(20)is for the ideal drift region length,LD(ideal)= 1.62×10?6BV7/6,and for the C2HKMOS,η ≈0.959 yields the optimized drift region lengthLD(opt)= 1.70×10?6BV7/6. According toη ≈0.959 in the C2HKMOS, the optimizedLDis calculated at givenBV. In Fig. 5, the red dotted line representsLD–BVcurve of ideal PIN atγ=0 from Eq. (20). In Fig. 5(a), the C2HKMOS withNit=?1.0×1012cm?2shows that at the sameBV, a smallerαmeans a higher dosage in N-type CC region to ensure minimizedLDapproaching to the PIN limit.In Fig.5(b),the C2HKMOS withNit=1.0×1012cm?2shows that at the sameBV,the largerαneeds a wider P-type CC region and smallerNEC. Comparing with CHKMOS withoutQit,theLD–BVrelation of C2HKMOS can approach to the PIN limit as much as possible.

    Fig. 5. Values of optimized LD versus BV at various values of α, showing the smaller the width wCC, the closer to the PIN limit the value ofLD is,(a)for negative Qit with Nit=?1.0×1012 cm?2,and(b)for positive Qit with Nit=1.0×1012 cm?2. This case is much closer to the scenario of PIN limit.

    4. Optimization of specific ON-resistance

    The calculation ofRon,spin the C2HKMOS needs to take JFET into account like superjunction.[20–22]AfterBVdesign as aforementioned in Section 3,theQitis compensated for by CC region. In Fig.6(a),theQitis negative. So the CC region is chosen to be an N-type region with a concentration ofNCC.However,in Fig.6(b),the positive interface needs a P-type CC region.When the C2HKMOS is at ON-state,the source potential is grounded,and the drain potential isVDS. The CC region is unintentionally depleted for generating JFET effect.

    For the negativeQit, the conduction resistance in C2HKMOS includes two parts,i.e.,R1andR2,and expressed respectively as

    whereM1is the electron density in the N region,M2is the electron density of the CC region with JFET taken into account caused byQit,μ1andμ2are carrier mobilities in Eqs. (A17)and(A18),respectively. The Fermi potentialφfnis

    whereVtis the thermal voltage andniis the intrinsic carrier concentration.

    In the case of Fig. 6(a), the totalRon,sp,nis composed of parallel resistanceR1andR2as

    Fig. 6. Schematics of conduction channel in C2HKMOS (a) with negative Qit and N-doped CC region,and(b)with positive Qit and P-doped CC region, where dashed line denotes depletion boundary due to JFET effect caused by Qit.

    Fig.7. Curves of Ron,sp versus α of C2HKMOS at BV =400 V,800 V,and 1200 V:(a)Ron,sp,n–α curve with Nit=?1.0×1012 cm?2,and(b)Ron,sp,p–α curve with Nit=1.0×1012 cm?2.

    Figure 7 showsRon,sp,n/Ron,sp,pof C2HKMOSversus αatBV= 400 V–1200 V in steps of 400 V. As indicated in Eq. (24), a chosenNNCneedsNCCto be optimized in CC region to compensate forRon,sp,ninto a small value as shown in Fig. 7(a). Eventually, in the case of Fig. 7(b), the increasingαresults in enlargingRon,sp,p, which is mainly attributed to the reduction of conduction path with limited modification in Eq.(25).

    Figure 8 shows the curves ofRon,spversus NNCin various cases,demonstrating that at small variation ofBV,α,andNNCcan be quickly optimized to achieveRon,sp,n(opt)for the same value. This method means that for a given C2HKMOS,optimizedRon,sp,n(opt)is easily obtained by CC.

    Fig.8. Curves of Ron,sp versus NNC at optimization in C2HKMOS,showing(a) Ron,sp,n–NNC curve with Nit =?1.0×1012 cm?2 and (b) Ron,sp,p–NNC curve with Nit=1.0×1012 cm?2. The color bands represent the same values of BV for a certain value of LD. NNC and NCC as the parameters are optimized for minimizing Ron,sp.

    5. Optimization method

    The optimization process ofRon,sp–BVtrade-off is estimated as follows.

    (i) At a given targetedBV, the range ofLDis achieved from Eq.(20). ThisBVapproaches to the limit of PIN diode to achieve minimumLDby charge compensation in internal relation of doping concentration, whereas the relation betweenNCCandNEC, which is associated withα, is realized via Eq.(9)profiting fromDx=0 in the HK region.

    (ii)In order to minimizeRon,sp,the evaluation ofNCCandNECshould be further determined in a small range. Hence,the optimization ofNCC,NEC, andαis an eventual target forRon,sp–BVtrade-off. Simplifying Eqs. (24) and (25),Ron,sp–BVtrade-off is uniformly rewritten as

    According to forward steps,in a range of 400 V≤BV ≤1200 V and 2μm≤wN≤6μm,the design parametersNCCandαwith negativeQitare fitted into power function as

    Table 1. Key data in optimization(wN=4μm).

    Fig. 9. Curves of Ron,sp–BV trade-off (a) at Nit =?1.0×1012 cm?2 and wN =5 μm, (b) at Nit =1.0×1012 cm?2 and wN =5 μm, (c) at Nit=?1.0×1012 cm?2 and wN=6μm,and(d)at Nit=1.0×1012 cm?2 and wN=6μm.

    For the optimized Eq.(28),the corresponding optimizedRon,sp,nis also given as

    In the same steps for C2HKMOS with positive interface in a range of 400 V≤BV ≤1200 V and 2μm≤wN≤6μm,,the optimizedNCC,α,andRon,sp,nare achieved as

    The key data are given in Table 1 in calibration. According to optimization method, theRon,sp–BVtrade-off by Eqs. (29) and (31) is illustrated in Fig. 9. Figures 9(a) and 9(c) representRon,sp–BVcurves in the case of Fig. 6(a). The negativeQitcompensated by CC region can enhance the total doping concentration in the drift region for loweringRon,sp.However, as shown in Figs. 9(b) and 9(d), the C2HKMOS with positiveQitdemonstrates that the CC region is introduced mainly into the smooth electric displacement to avoid degenerating theBV. With the increase ofwNwith respect to the ratio of ΔQEC/QNC,N-type CC region,and P-type CC region show the enhancement ofRon,sp-BVtrade-off in comparison with the CHKMOS.

    6. Conclusions

    For the quick designing of HKMOS withQit, an analytical model is developed by the CC theory for the first time.This model reveals the CC mechanism from the angle of superposition byh modifying the electric displacement,and also predicts theBVlimit. In addition,the C2HKMOS with negative and the C2HKMOS with positiveQitare both thoroughly established to calculateRon,spwith JFET effect taken into account. A simple and effective method is proposed to mitigateRon,sp–BVtrade-off by adding the N-type or P-type CC region into HKMOS. The model results and simulation results are shown to be in agreement between each other.

    Acknowledgements

    Project supported by the National Natural Science Foundation of China (Grant No. 61404110) and the National Higher-education Institution General Research and Development Project(Grant No.2682014CX097).

    Appendix A:Expressions of A in Eq.(2)

    The distribution ofQitis usually uneven. TheQitwindow is divided into M parts. The midpoint of theN-th window isym, corresponding to the densityNit,mof each part, the widthWit,mof each part described as[10]

    Arbitrarily distributedQitaverage densityNitis

    The carrier mobility in the N-type drift region is

    The carrier mobility in the N-type CC region is

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