Study on the photo response of a CMOS sensorintegrated with PIN photodiodes

YANG Cheng-cai，JU Guo-hao,3，CHEN Yong-ping

(1.Key Laboratory of Infrared Imaging Materials and Detectors,Shanghai Institute ofTechnical Physics,Chinese Academy of Sciences,Shanghai 200083,China; 2.University of Chinese Academy of Sciences,Beijing 100049,China; 3.School of Information Science & Technology,Shanghai Tech University,Shanghai 201210,China)

*Corresponding Author, E-mail:chen_yp@mail.sitp.ac.cn

Abstract: Traditional CMOS image sensors generally use PN photodiodes or PPDs as the photosensitive element, which are formed based on N-well/P-type substrates using the LV-CMOS process. The PIN photosensitive element has small junction capacitance and high quantum efficiency. By using High-Voltage CMOS(HV-CMOS), monolithic integration of CMOS circuits with PIN photodiodes can be achieved. In this paper, the relationship between the photo-response characteristics, NEP of CMOS detectors and pixel size and reset voltage are studied. The results show that the pixel charge gain can be increased by about one order of magnitude when the photosensitive element is changed from PN to PIN and the transient charge gain of the pixel is larger than 1/Cpd. This is closely related to the size of the diode and reset voltage. It is found that small pixels are more suitable for fast detection of short integration time under weak signals because of their higher charge gain and lower equivalent noise. If combined with microlenses, small pixels can be further advantageous in low light detection.

Key words: CMOS image sensor;HV-CMOS;PIN photodiodes;3T pixel structure

1 Introduction

Low light level imaging is an optical imaging process under conditions with low illumination(below 10-2lx). It plays an important role in aerospace, meteorological observation and military reconnaissance[1-4]. With the development of CMOS technology, CMOS image sensors began to replace CCDs and gradually extended to the field of low-light-level imaging[5-7]. At present, the most commonly used CMOS image sensor generally uses 3T or 4T pixel structures with photodiodes based on PN type due to the limitation of CMOS process compatibility. 4T pixels can achieve higher sensitivity and lower noise due to the addition of a charge transfer transistor and readout floating capacitors, but it also limits the size of pixels and are not suitable for the development of large pixel devices. The PIN photodiode is a special form of PN photodiode. It has the advantages of small junction capacitance, fast response speed, high quantum efficiency and no absolute restriction on pixel size[8]. However, the fabrication of PIN photosensitive elements is not compatible with the standard low voltage CMOS process(LV-CMOS). At present, most of the research on the integration of PIN photosensitive elements and CMOS circuits is based on SOI process[9-10].

In this paper, the photo-response characteristics of CMOS image sensors with a PIN photodiode as the photosensitive element in HV-CMOS processes are analyzed, with special attention given to the effects of pixel size and reset voltage on the photo-response characteristics and the noise equivalent power(NEP) of the detector.

2 HV-CMOS process

Compared with the standard LV-CMOS process, the HV-CMOS process(shown in Fig.1) adds a lightly doped p-type epitaxial layer with a thickness of about 20 μm and a resistivity of 400～1 000 Ω·cm to the heavily doped p-type substrate. At the same time, in order to meet the low resistivity requirement(1～10 Ω·cm) of the substrate of CMOS circuits, deep N-wells were fabricated on the p-type epitaxial layer in the MOS region before the fabrication of the PMOS and NMOS. Then the CMOS circuit was fabricated on the deep N-wells using the standard LV-CMOS process, while photosensitive elements were fabricated directly on the high-resistivity p-type epitaxial layer. In this way, monolithic integration of a PIN photosensitive element and a CMOS circuit was formed(shown in Fig.2)[11].

Fig.1 Schematic diagram of HV-CMOS process 圖1 HV-CMOS工藝示意圖

CMOS circuits fabricated through this process can operate at high voltages. Now，this process is one of the standard CMOS fabrication processes.

Fig.2 Monolithic integration of PIN photosensitive element and CMOS circuit 圖2 PIN光敏元與CMOS電路單片集成

In this process, PIN photodiodes consist of a heavily doped p(p+) region (P layer), a lightly doped p(p-) epitaxial layer(I layer) and a heavily doped n(n+) region(N layer). The existence of the intrinsic layer(I layer) increases the width of the depletion region and quantum efficiency of the diode, which is the fundamental reason that the sensitivity of PIN photodiode is higher than that of the PN photodiode. On the other hand, the thick dielectric layer formed on the surface of PIN photosensitive element can be removed in this process and the quantum efficiency of the photosensitive element can be further improved by replacing it with a single layer of antireflection coating.

3 3T pixel structure

The CMOS sensor with a PIN junction as the photosensitive element can use a 3T pixel structure(shown in Fig.3). This structure is advantageous for its simple structure and high filling factor[12]. In the pixel structure, the PIN photodiode is the only photosensitive part of the whole CMOS image sensor; M1 is a reset transistor, through which the photodiode is reset to the reverse bias voltage value when the signal is read out; and M2 is a follower transistor, responsible for the pixel signal readout. In order to reduce the effect of charge injection, the size of the reset transistor should be as small as possible.

Fig.3 3T pixel structure in HV-CMOS process 圖3 HV-CMOS工藝中的3T像素結(jié)構(gòu)

Compared with the 3T pixel structure, the 4T pixel adds a charge transfer tube and a floating capacitor which needs a special design behind the photodiode for it to achieve true correlation double sampling. However, this also makes the 4T pixel production process complex and costly. Furthermore, in order to achieve higher sensitivity, the capacitance of the floating capacitor is smaller, which makes it inconducive to the development of large-pixel devices.

Fig.4 Read-out circuit in CMOS sensor 圖4 CMOS傳感器讀出電路

Pixel signal readout requires a column level circuit for further amplification and sampling output(shown in Fig.4). The circuit mainly includes a CTIA(Capacitive Transimpedance Amplifier), an amplifier(for signal amplification), sample and hold circuits(for correlation double sampling) and source followers(for output drive).

4 Detector performance analysis

4.1 Differences in structure and process

The standard LV-CMOS process provides a PN photodiode structure based on a low resistivity P-substrate and an N-well. Both PMOS and NMOS are fabricated in wells(Twin-well process). Compared with the PIN photodiodes in the HV-CMOS process,the space charge region(depletion layer) of the two photosensitive elements is quite different(shown in Fig.5), which introduces significant changes to the photo response characteristics of PIN and PN photodiodes.

Fig.5 Space charge regions of PN and PIN 圖5 PN和PIN空間電荷區(qū)

Tab.1 Formula parameters

4.2 Junction capacitance and dark current

Junction capacitance and dark current are two important characteristics of photodiodes, in which junction capacitance is related to charge conversion gain, while dark current mainly affects the dynamic range of the detector and introduces shot noise.

The junction capacitance and dark current of PN and PIN photodiodes in the standard LV-CMOS and HV-CMOS processes can be expressed in formulas (1) and (2), respectively.

(1)

Id=(JS+GLEAK·V)·WL+

(JSSW+GLEAKSW·V)·2·(W+L) ,

(2)

whereWandLare the dimensions of a diode′s cross section andVis the reverse bias voltage of the photodiode. At room temperature, the parameters of different processes are shown in Tab.1.

To simplify the analysis, the photodiode′s cross section is set to a square such thatW=L. Using formula 1, the relationship between junction capacitance and bias voltage(V) of different pixel sizes(L)(shown in Fig.6) and between junction capacitance and pixel size(L) of different bias voltages(V)(shown in Fig.7) can be obtained.

Fig.6 Relationship between junction capacitance and bias voltage 圖6 結(jié)電容隨偏壓變化關(guān)系

Fig.7 Relationship between junction capacitance and pixel size 圖7 結(jié)電容與像素大小的關(guān)系

It can be seen that the junction capacitance of the PN photodiode is larger than that of the PIN photodiode with the same area and bias voltage. In large pixels(L>80 μm), the junction capacitance of the PN photodiode is almost one order of magnitude larger than that of the PIN photodiode. Even in small pixels(L≈20 μm), the junction capacitance of the PN photodiode is also about 5 times of that of PIN photodiode. The junction capacitance of both of them varies obviously at low voltages(<1 V) while it varies little when the voltage is higher than 2 V. As shown in Fig.7, the junction capacitance of the PIN photodiode is linear with the length of the pixel, while the junction capacitance of PN photodiode is quadratic. This shows that the junction capacitance is mainly determined by the perimeter capacitance in the PIN photodiode, while the junction capacitance of the PN photodiode is mainly determined by the area capacitance. At the same time, the junction capacitance of the PIN is mainly determined by the perimeter capacitance, which indicates that the photosensitive element with small pixels also has a wide depletion region in the transverse direction. As a result, smaller photodiodes can achieve the same quantum efficiency as larger photosensitive surfaces.

Using formula 2, the relationship between dark current and bias voltage at different pixel sizes(L)(shown in Fig.8), and the relationship between dark current and pixel sizeLat different bias voltages(shown in Fig.9) can be obtained.

Fig.8 Relationship between dark current and bias voltage 圖8 暗電流與偏置電壓大小的關(guān)系

Fig.9 Relationship between dark current and pixel size 圖9 暗電流與尺寸L的變化關(guān)系

It can be seen that under the same area and bias voltage, the dark current of a PIN photodiode is larger than that of a PN photodiode, generally 1-2 orders of magnitude higher. Therefore, in applications, PIN photodiodes need to be cooled. As shown in Fig.9, the dark current is linearly related to the lengthL, which indicates that the dark current is mainly composed of the perimeter leakage current.

4.3 Sensitivity of devices

Charge conversion gainCGis one of the most important characterization parameters of a detector′s sensitivity, which reflects the effect of signal charge on junction voltage. Usually, the junction capacitance of a diode is considered as a planar capacitor. As a result, for a given signal charge ΔQ, the voltage variation ΔVon the junction capacitanceCpdsatisfies the following relationship:

ΔQ=Cpd·ΔV.

(3)

Therefore, the charge conversion gainCGequals to 1/Cpd[13].

For PIN photodiodes, the situation is more complicated. As analyzed earlier, the junction capacitance of a PIN photodiode varies with the bias voltage, especially at low bias voltages. This means that its junction capacitance is continuously changing during the integral process of the signal charge. It cannot be calculated using the method in formula (3). Instead, the numerical calculation method can be used.

The voltage variation ΔVcaused by the charge is the difference between the reset voltageVresetand the pixel voltageVpixel. When the parasitic capacitance of the reset transistor and the follower transistor is ignored, the photodiode satisfies the charge formula at any time:

Q=Vpd·Cpd.

(4)

The charge variation on the junction capacitor is the sum of the signal charge(Qs) and the dark current charge(Qd) from the start of reset to the integration timeti. That is,

Qs+Qd=(Is+Id)·ti,

(5)

therefore,

Vreset·CPd0-VPd·CPd=(Is+Id)·ti,

(6)

whereCpd0is the junction capacitance of the PIN photodiode at the initial time,Isis the photo current, andIdis the dark current. Accordingly,

Vpd·Cpd=Vreset·CPd0-(Is+Id)·ti.

(7)

Therefore, given the pixel size, fixed reset voltageVresetand integration timeti, the relationship curve between the junction voltageVpdand the photo currentIscan be obtained by numerical calculation(shown in Fig.10).

Fig.10 Relationship between junction voltage and photo current 圖10 結(jié)電壓與光電流關(guān)系

Fig.10 shows the variation of junction voltage with photo-current for different PIN photodiode sizes when the reset voltage is 3.3 V and the integration time is 100 μs. It must be noted that the variation of junction voltage includes the influence of dark current, and the influence of dark current need to be removed in order to obtain the variation of voltage caused by signal charge.

The voltage variation caused by the dark current is equal to the voltage variation when light is absent. That is:

ΔVd=Vreset-Vpd(Is=0) .

(8)

Therefore, the voltage change caused by the photo signal is:

ΔVs=Vreset-Vpd-ΔVd.

(9)

Using the above formula, under the same conditions as in Fig.10, the relationship between voltage variation and photocurrent(shown in Fig.11) can be obtained, which essentially varies linearly.

Therefore the average charge gainCGin an integral timetican be expressed as:

(10)

This reflects the average sensitivity of the integral charges, which is closely related to junction capacitance. Usually, small signal sensitivity needs to be considered. Specifically, that is the instantaneous charge gain of pixelsCG′:

(11)

Since the junction capacitance of the PIN photodiode decreases with an increase of voltage(i.e., ?Cpd/?Vis a negative value) the transient charge gain of the pixel is higher than the reciprocal of the transient capacitance 1/Cpd, which is usually considered as charge gain.

Fig.11 Relationship between photo signal voltage variation and photo current 圖11 光信號電壓變化與光電流關(guān)系

In Fig.11, although the independent variable is photo currentIs, since the integration timetiis fixed, the independent variable can be considered as signal charge. By deriving the curve, the transient charge gain curve in the process of self-integration(shown in Fig.12) is obtainable.

Fig.12 Relationship between transient charge conversion gain and photo current variance 圖12 瞬態(tài)電荷轉(zhuǎn)換增益隨光電流變化關(guān)系

It can be seen from the graph that small pixels have a higher charge gain and that a small signal gain gradually decreases with the increase in photocurrent. This is more obvious with the small pixel. Therefore, in order to obtain higher pixel charge gain in low-light detection, smaller pixels should be selected.

Finally, we calculate the instantaneous junction capacitance of the pixel in the integration process and compare its reciprocal(1/Cpd) with the real instantaneous charge gain(shown in Fig.13). Here, the pixel size is 10 μm×10 μm.

Fig.13 Comparison between transient charge gain and the reciprocal of capacitance value 圖13 瞬態(tài)電荷增益與電容值倒數(shù)的比較

It can be seen that the transient charge gain of pixels is always greater than the reciprocal of junction capacitance, which is consistent with the analysis of Eq.11. Under 10 μm×10 μm pixel size, the instantaneous charge gain reaches 16 μV/e-. By using PIN photodiodes, we can not only obtain higher average charge gain(their capacitance is smaller than that of PN photodiodes) but also obtain higher transient charge gain than conventional methods. The transient charge gain of the pixel is the same as quantum efficiency, which reflects the charge sensitivity of the photosensitive element.

4.4 Noise analysis of devices

The equivalent input noise of the CMOS image sensor can be expressed as the sum of noise produced by pixel and noise produced by readout circuit:

(12)

wherenn,pixis the number of noise electrons produced by PIN photodiodes,vn,circuitis the equivalent output noise voltage of the on-chip readout circuit,Atotis the total voltage gain of the on-chip circuit, andGeis the charge conversion gain of the PIN photodiode. HereGe=q·CG, whereqis the charge of electrons.

4.4.1 Noise of the PIN photodiode

The noise of the PIN photodiode mainly includes shot noise and reset(kTC) noise. Since the reset noise can be suppressed by correlated double sampling, the dominant one is shot noise. Shot noise is caused by the discreteness of the carriers that form the current, and is usually regarded as white noise. In PIN, shot noise is related to dark current and incident photon. The electron number of shot noise can be expressed as[14]:

(13)

In a certain integration timeti, the dark current noise electronsNdarkand photo-generated noise electronsNsigcan be expressed as

(14)

(15)

The photocurrent of a PIN photodiode can be expressed as the product of the current responsivityRi) and the incident light power(P),i.e.,

Is=Ri·P,

(16)

and the incident light power(P) can be expressed as the product of the light power per unit area(Ev) and the area of the photosensitive surface(l2,lis the length of the photosensitive surface):

P=l2·Ev.

Therefore, photocurrent can also be expressed as:

Is=Ri·l2·Ev.

(17)

4.4.2 The noise of the readout circuit

The readout circuit of a CMOS image sensor mainly includes a source follower, a CTIA amplifier and a sample and hold circuit.

The source follower is used to drive the output of the signal. It is used in two parts of the circuit, which are used for pixel signal readout and final output drive. The CTIA is the core part of the CMOS image sensor readout circuit, which mainly includes a single-ended cascode amplifier and a feedback loop composed of two capacitors, as shown in Fig.14.

Fig.14 Schematic diagram of a CTIA structure 圖14 CTIA結(jié)構(gòu)示意圖

The total gainAtotof the CMOS image sensor readout circuit is the product of the gain of the above three parts, which is a fixed value before saturation. At the same time, the equivalent output noise voltage of the on-chip readout circuit can also be regarded as a constant at a given bandwidth[15]. In this paper, readout circuits are designed by the 0.35 μm HV-CMOS process.

4.5 Analysis of low light level detection capability of devices

Noise equivalent power(NEP) is the incident light power(P1) when the signal and noise are equal(SNR=1) in the detector,NEP=P1. According to the definition, the smaller the value, the better the detector performance.

When the signal-to-noise ratio(SNR) equals 1,Nsig=nn,input, wherenn,inputis the total equivalent input noise. Bringing the relevant formula to it,

(18)

For convenience of calculation, the above formula can be rewritten as:

(19)

then, the solution can be obtained:

(20)

therefore,

NEP=P1=l2Ev.

(21)

Combined witha0=(Ril2ti)/q, it can be concluded thatl2/a0is a quantity independent of pixel size. Meanwhile, from the above analysis, we know that aslincreases,Gedecreases andIdincreases.a1also increases withl. So, the relationship between theNEPand the pixel size for integration times less than 100 μs, a 3.3 V reset voltage and 0.5 A/W current responsivity(shown in Fig.15) can be obtained. The results show that, for the detector integrated with a PIN photosensitive element and a CMOS circuit developed by the HV-CMOS process, when the pixel is 20 μm×20 μm, the device′s NEP can reach 0.08 pW in a short integration time(100 μs). This result is nearly 2 times lower than that of the detector of the same size developed by the standard LV-CMOS process.

Fig.15 Relationship between NEP and pixel size 圖15 NEP與像素大小的關(guān)系

5 Conclusions

In this paper, a CMOS image sensor with 3T pixel structure integrated with PIN photosensitive elements was analyzed theoretically and the relationship between photo-response characteristics and noise equivalent power and the pixel size and bias voltage were studied in depth. The results show that generally, the junction capacitance of a PIN diode is about one order of magnitude lower than that of a PN diode, meaning that the PIN photodiode has higher charge conversion gain. Meanwhile, its transient charge gain is higher than 1/Cpd. Therefore, the equivalent input noise of a detector integrated with PIN photosensitive elements should be one order of magnitude lower under the same readout circuit. Because smaller pixels have smaller junction capacitance and dark current, they also have smaller NEP. This research should be instructive for the design of low-light level detectors.

——中文對照版——

1 引 言

微光成像是指在低照度(照度<10-2lx)環(huán)境中的光學(xué)成像過程。在航空航天、氣象觀測以及軍事偵查等領(lǐng)域，微光成像技術(shù)都發(fā)揮著極為重要的作用[1-4]。隨著CMOS工藝的發(fā)展，CMOS圖像傳感器開始替代CCD，逐步向微光成像領(lǐng)域擴(kuò)展[5-7]。目前，由于CMOS工藝兼容性的限制，最為常用的CMOS圖像傳感器一般采用3T或4T像素結(jié)構(gòu)，并且光電二極管均是以PN型為基本構(gòu)成。4T像素由于增加了電荷轉(zhuǎn)移管和讀出浮置電容，可以實現(xiàn)更高的靈敏度和更低的噪聲，但同時也限制了像素的大小，不適合大像素器件的研制。PIN光電二極管是PN結(jié)光電二極管的特殊形式，具有結(jié)電容小、響應(yīng)速度快、量子效率高等優(yōu)點(diǎn)[8]，對像素大小也沒有絕對的限制。但PIN光敏元的制作與標(biāo)準(zhǔn)低壓CMOS工藝(LV-CMOS)不兼容。目前，對PIN光敏元與CMOS電路集成的研究大多基于SOI工藝[9-10]。

在本文中，將對采用HV-CMOS工藝的以PIN光電二極管為光敏元的CMOS圖像傳感器的光電響應(yīng)特性進(jìn)行分析，重點(diǎn)研究像素尺寸與復(fù)位電壓對探測器光電響應(yīng)特性和噪聲等效功率(NEP)的影響。

2 HV-CMOS工藝

與標(biāo)準(zhǔn)LV-CMOS工藝相比，HV-CMOS工藝(圖1)在重?fù)诫s的p型襯底之上增加一層厚度約為20 μm的輕摻雜p型外延層，電阻率為400～1 000 Ω·cm。同時，為了實現(xiàn)CMOS電路對襯底低電阻率(1～10 Ω·cm)的要求，該工藝在制作PMOS和NMOS之前，首先MOS管區(qū)域的高阻P型外延層上制備深阱N層，MOS在深阱N層上再按照標(biāo)準(zhǔn)LV-CMOS工藝制備，而光敏元則直接在高阻的P型外延層上制備，形成PIN光敏元與CMOS電路的單片集成(圖2)[11]。

采用這種工藝制備的CMOS電路具有高壓工作的能力，目前已是標(biāo)準(zhǔn)CMOS工藝的一種。

本工藝中，PIN光電二極管由重?fù)诫s的p(p+)型區(qū)域(P層)、輕摻雜的p(p-)型外延層(I層)以及重?fù)诫s的n(n+)型區(qū)域(N層)組成。其本征層(I層)的存在，增加了耗盡區(qū)的寬度，提高了二極管的光電量子效率，這是PIN光電二極管靈敏度高于PN結(jié)光電二極管的根本原因所在。另一方面，本工藝還可以去除PIN光敏元表面在CMOS工藝過程中形成的很厚的介質(zhì)層，代之以單層抗反射介質(zhì)，使得光敏元的量子效率得到進(jìn)一步提高。

3 3T像素結(jié)構(gòu)

以PIN為光敏元的CMOS傳感器可以采用3T像素結(jié)構(gòu)(圖3)。該結(jié)構(gòu)具有結(jié)構(gòu)簡單、填充系數(shù)高等優(yōu)點(diǎn)[12]。在像素結(jié)構(gòu)中，PIN光電二極管是整個CMOS圖像傳感器中唯一感光的部分；M1是復(fù)位管，當(dāng)信號被讀出后，光電二極管通過復(fù)位管復(fù)位至反偏電壓值；M2是跟隨管，負(fù)責(zé)像素信號的讀出。為了減小電荷注入效應(yīng)的影響，復(fù)位管的尺寸應(yīng)當(dāng)盡可能的小。

相比于3T像素結(jié)構(gòu)，4T像素在光電二極管后面增加了電荷轉(zhuǎn)移管和需要特殊設(shè)計的浮置電容，從而能夠?qū)崿F(xiàn)真正的相關(guān)雙采樣，但這也使得4T像素工藝復(fù)雜、成本較高。同時，為實現(xiàn)更高的靈敏度，浮置電容容值較小，從而不利于大像素器件的研制。

像元信號讀出需要列級電路進(jìn)行進(jìn)一步放大和采樣輸出(圖4)。列級電路主要包括CTIA放大器(用于信號放大)、采樣保持電路(用于相關(guān)雙采樣)和源極跟隨器。

4 探測器性能分析

4.1 結(jié)構(gòu)和工藝差異

標(biāo)準(zhǔn)LV-CMOS工藝提供了基于低阻P型襯底與N阱的PN結(jié)光電二極管結(jié)構(gòu)，片上電路中的PMOS和NMOS都制作在阱中(雙阱工藝)。與HV-CMOS工藝中的PIN光電二極管相比，兩種光敏元的空間電荷區(qū)(耗盡層)存在較大的差異(圖5)，這使得PIN和PN光電二極管在光電響應(yīng)特性上發(fā)生了極大的變化。

4.2 結(jié)電容和暗電流

結(jié)電容和暗電流是光電二極管兩個極為重要的特性，其中，結(jié)電容與電荷轉(zhuǎn)換增益有關(guān)，而暗電流則主要影響探測器的動態(tài)范圍，并引入散粒噪聲。

標(biāo)準(zhǔn)LV-CMOS和HV-CMOS工藝下，PN和PIN光電二極管的結(jié)電容和暗電流都分別可以用式(1)和式(2)表示：

(1)

Id=(JS+GLEAK·V)·WL+

(JSSW+GLEAKSW·V)·2·(W+L) ,

(2)

其中，W和L分別是二極管的尺寸，V是光電二極管的反偏電壓。室溫下，不同工藝下的各參數(shù)值如表1所示。

為了簡化分析，選取光電二極管的橫截面為一正方形，即W=L。通過公式(1)，可以得出不同像素尺寸(L)下結(jié)電容與偏壓(V)的關(guān)系(圖6)以及不同偏壓(V)下結(jié)電容與像素尺寸(L)的關(guān)系(圖7)。

可以看出，在相同面積、相同偏壓下，PN結(jié)電容要明顯大于PIN結(jié)電容；在大像素(L>80 μm)中，PN結(jié)電容差不多要比PIN大一個數(shù)量級，即使在小像素(L≈20 μm)下，PN結(jié)電容也要接近PIN結(jié)電容的5倍左右。其中，低壓下(<1 V)結(jié)電容變化較為明顯，而當(dāng)電壓>2 V 時，兩者結(jié)電容都變化不大。在圖7中還可以看出，PIN結(jié)電容與像素邊長基本呈線性關(guān)系，而PN結(jié)電容則與邊長L呈二次方關(guān)系，這表明，在PIN二極管中，結(jié)電容主要是由邊長電容決定的；而PN結(jié)電容則主要是面積電容。同時，小像素情況下PIN光敏元的結(jié)電容主要由邊長電容決定，說明光敏元在橫向也存在較寬的耗盡區(qū)。這一特性意味著較小的光電二極管設(shè)計事實上可以實現(xiàn)與較大光敏面相同的光電量子效率。

利用公式(2)可以得到不同像素尺寸(L)下暗電流與偏壓的關(guān)系(圖8)以及不同偏壓下暗電流與尺寸L的關(guān)系(圖9)。

可以看出，相同面積和偏壓下，PIN光電二極管的暗電流要比PN光電二極管高1～2個數(shù)量級，因此，在應(yīng)用中，PIN光電二極管需要進(jìn)行降溫。在圖9中，還可以得到，兩者的暗電流與邊長L都呈線性關(guān)系，這表明，暗電流主要由邊緣漏電流組成。

4.3 器件的靈敏度

電荷轉(zhuǎn)換增益CG反映了信號電荷對結(jié)電壓的影響情況，是探測器靈敏度的重要表征參數(shù)之一。通常情況下，將二極管的結(jié)電容看作為一平板電容器，因此，對于一定的信號電荷ΔQ，其在結(jié)電容Cpd上所引起的電壓變化量ΔV滿足如下關(guān)系：

ΔQ=Cpd·ΔV.

(3)

因此，其電荷轉(zhuǎn)換增益CG就等于1/Cpd[13]。

而對于PIN光電二極管來講，情況則稍顯復(fù)雜。正如前面所分析的那樣，PIN的結(jié)電容隨偏置電壓變化而變化，在低偏壓下，情況更加明顯。這就意味著信號電荷在自積分過程中，其結(jié)電容也在隨之改變著。顯然，無法像式(3)那樣進(jìn)行計算，在此可以采用數(shù)值計算的方法。

對于電荷造成的電壓變化ΔV，它是復(fù)位電壓Vreset與積分后電壓Vpixel的差值。在忽略復(fù)位管和跟隨管寄生電容的情況下，在任何一個時刻，光電二極管都滿足電荷公式:

Q=Vpd·Cpd.

(4)

從復(fù)位開始到積分ti時間后，結(jié)電容上的電荷變化為信號電荷(Qs)與暗電流電荷(Qd)之和，即：

Qs+Qd=(Is+Id)·ti,

(5)

因此：

Vreset·CPd0-VPd·CPd=(Is+Id)·ti,

(6)

其中，Cpd0是PIN光電二極管初始時刻的結(jié)電容值，Is是光電流，Id是暗電流。經(jīng)整理可得：

Vpd·Cpd=Vreset·CPd0-(Is+Id)·ti.

(7)

因此，在給定像素尺寸以及固定復(fù)位電壓Vreset和積分時間ti的情況下，可以通過數(shù)值計算的方法得到積分后結(jié)電壓Vpd與光電流Is的關(guān)系曲線(圖10)。

圖10為在復(fù)位電壓為3.3 V、積分時間為100 μs下，不同尺寸PIN光電二極管積分后結(jié)電壓隨光電流的變化關(guān)系。必須注意到，結(jié)電壓的變化包含了暗電流的影響，因此，為了獲得由信號電荷而帶來的電壓變化量，需要將暗電流的影響去除。

暗電流造成的電壓變化就等于在無光情況下的電壓變化，即

ΔVd=Vreset-Vpd(Is=0) ,

(8)

因此，光電信號電壓變化量ΔVs為

ΔVs=Vreset-Vpd-ΔVd.

(9)

使用上面的公式，在與圖10相同的條件下，可以得到ΔVs與光電流Is之間的關(guān)系(圖11)，兩者基本呈線性變化。

因此，對于在一個積分時間ti內(nèi)的平均電荷增益CG，可以表示為：

(10)

這反映了積分電荷的平均靈敏度，這與結(jié)電容密切相關(guān)。通常，還需要考慮小信號靈敏度，也就是像素的瞬態(tài)電荷增益CG′：

(11)

由于PIN光電二極管的結(jié)電容隨電壓增大而減小，即?Cpd/?V為一負(fù)值，因此，像素的瞬態(tài)電荷增益要高于通常認(rèn)為的瞬態(tài)電容的倒數(shù)，即CG′>1/Cpd。

考慮圖11，雖其自變量是光電流Is，但由于積分時間ti是固定的，可以將自變量看作是電荷量。對圖中曲線求導(dǎo)，就可以得到自積分過程中瞬態(tài)電荷增益變化曲線(圖12)。

從圖中可以看出，小像素?fù)碛兄叩碾姾稍鲆?；隨著光電流的增大，小信號增益在逐漸減小，這在小像素尺寸中變化的更加明顯。因此，在微光探測中，為了獲得更高的像素電荷增益，應(yīng)當(dāng)選取較小的像素。

最后，計算像素在積分過程中的瞬態(tài)結(jié)電容值，并取其倒數(shù)(1/Cpd)，也是通常認(rèn)為的電荷增益，將其與真實的瞬態(tài)電荷增益作對比(圖13)。在此，選取的是10 μm×10 μm的像素。

從圖中可以看出，像素的瞬態(tài)電荷增益總是大于結(jié)電容的倒數(shù)，這與式(11)的分析相符。在10 μm×10 μm像素大小下，像素的CG達(dá)到了16 μV/e-。通過使用PIN光電二極管，不僅可以獲得更高的平均電荷增益(其結(jié)電容相比于PN光電二極管更小)，還可以獲得高于傳統(tǒng)方法的瞬態(tài)電荷增益。而像素的瞬態(tài)電荷增益與量子效率一樣，反映的是光敏元在小信號情況下的電荷靈敏度。

4.4 器件的噪聲分析

CMOS圖像傳感器的等效輸入噪聲可以表示為像素產(chǎn)生的噪聲與外圍電路產(chǎn)生的噪聲之和，即：

(12)

在此，使用的是等效噪聲電子數(shù)。其中，nn,pix是PIN光電二極管產(chǎn)生的噪聲，vn,circuit是片上讀出電路的等效輸出噪聲電壓。Atot是片上電路總的電壓增益，Ge是PIN光電二極管的電荷轉(zhuǎn)換增益。需要注意的是，Ge與式(10)略有不同，由于需要得到的是噪聲電子數(shù)，因此，可以認(rèn)為Ge=q·CG,其中q為電子的電荷量。

4.4.1 PIN噪聲

PIN光電二極管的噪聲主要包括散粒噪聲以及復(fù)位(kTC)噪聲。其中，由于復(fù)位噪聲可以通過相關(guān)雙采樣進(jìn)行抑制，因此占據(jù)主導(dǎo)地位的是散粒噪聲。散粒噪聲是由形成電流的載流子的離散性造成的，通常被認(rèn)為是白噪聲。在CMOS圖像傳感器中，散粒噪聲由暗電流和入射光子有關(guān)。散粒噪聲電子數(shù)可以被表示為[14]：

(13)

其中，在一定積分時間ti中，暗電流電荷Ndark和光生電荷Nsig分別可以表示為：

(14)

(15)

PIN光電二極管的光電流可以表示為電流響應(yīng)度(Ri)與入射光功率(P)的乘積，即

Is=Ri·P,

(16)

入射光功率(P)可以表示為單位面積光功率(Ev)與感光面面積(l2，l是感光面長度)的乘積，即

P=l2·Ev.

因此，光電流也可以表示為

Is=Ri·l2·Ev.

(17)

4.4.2 讀出電路噪聲

CMOS圖像傳感器的讀出電路主要包括源極跟隨器、電容跨阻放大器(CTIA)以及采樣保持器。

源極跟隨器主要是對輸出信號進(jìn)行驅(qū)動，電路中有兩處使用到了源極跟隨器，分別是用于像素信號讀出和最終的輸出驅(qū)動。

CTIA是CMOS圖像傳感器讀出電路的核心部分，結(jié)構(gòu)主要包括：單端級聯(lián)放大器以及兩個電容組成的反饋回路，結(jié)構(gòu)如圖14所示。

CMOS圖像傳感器讀出電路的增益Atot為上面3部分增益的乘積，在達(dá)到飽和前，這是一個定值。同時，在給定帶寬下，片上讀出電路的等效噪聲也可以看成是常數(shù)[15]。在本文中，讀出電路使用0.35 μm的HV-CMOS工藝進(jìn)行設(shè)計。

4.4.3 器件的微光探測能力分析

噪聲等效功率(NEP)是指光電探測器中信號和噪聲相等時(SNR=1)的入射光功率(P1)，即NEP=P1。根據(jù)定義，該值越小表示探測器性能越好。

當(dāng)信噪比等于1時，得到Nsig=nn,input，將相關(guān)公式帶入可得：

(18)

為了方便計算，將上式改寫為

(19)

可以求得：

(20)

因此，信噪比等于1時的入射光功率P1(NEP)為

NEP=P1=l2Ev.

(21)

結(jié)合a0=(Rl2ti)/q，可以得出l2/a0是一個與像素大小無關(guān)的量，而在上面分析中，已知：l增大，Ge減小，Id增大，因此，a1也會隨l增大而增大。可以得到，在積分時間100 μs、復(fù)位電壓為3.3 V以及響應(yīng)度為0.5 A/W的條件下，器件的NEP與像素大小的關(guān)系如圖15所示。從該結(jié)果可以得知，對于采用HV-CMOS工藝研制的PIN光敏元與CMOS電路單片集成的探測器，當(dāng)像素在20 μm×20 μm時，在短積分時間(100 μs)的情況下，器件的NEP可以達(dá)到0.08 pW。這一結(jié)果比相同大小的標(biāo)準(zhǔn)LV-CMOS探測器低了近2倍。

5 結(jié) 論

本文對集成了PIN光敏元的3T像素CMOS圖像傳感器進(jìn)行了理論分析，重點(diǎn)研究了光電響應(yīng)特性和噪聲等效功率與像素大小以及偏置電壓的關(guān)系。研究表明，在其他條件都相同的情況下，PIN二極管的結(jié)電容比PN結(jié)二極管要低一個數(shù)量級左右，因此，PIN也擁有了更高的電荷轉(zhuǎn)換增益；同時，PIN的瞬態(tài)電荷增益要高于通常認(rèn)為的1/Cpd。所以，在外圍電路相同的情況下，集成了PIN光敏元的探測器的等效輸入噪聲也要低一個數(shù)量級；同時，由于小像素的結(jié)電容和暗電流更小，因此也就擁有了更小的NEP。該研究結(jié)果對微光探測器設(shè)計具有指導(dǎo)意義。