Effect of annealing temperature on the electrical properties of ZnO thin-film transistors

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Guangdong Research Center for Interfacial Engineering of Functional Materials, Shenzhen Key Laboratory of Special Functional Materials, College of Materials Science and Engineering, Shenzhen University, Shenzhen 518060, Guangdong Province, P.R.China

Abstract： In order to study the influence of annealing temperature (from room temperature to 500 ℃) on the electrical properties of ZnO thin film and thin-film transistors (TFTs), we carefully characterize the ZnO-TFT by using a wide range of techniques including X-ray diffraction (XRD), scanning electron microscope (SEM), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and photoluminescence (PL). The results show that the ZnO-TFTs annealed at 400 ℃ have the best performance with mobility of 2.7 cm2/Vs, threshold voltage of 4.6 V, on/off current ratio of 5×105 and subthreshold swing of 0.98 V/Dec. The improvement of the electrical performance could be attributed to the decrease of carrier concentration, the enhancement of crystallization in ZnO films, and the improvement of interface between the oxide semiconductor layer and the insulation layer.

Key words： film materials; ZnO; thin-film transistor; annealing temperature; mobility; interface

Because of the low mobility, traditional amorphous silicon thin-film transistors (TFTs) are unable to drive organic light-emitting diode (OLEDs) displays[1-2]. While poly-silicon TFTs have high mobility, the poor uniformity and high production cost make them unsuitable for large size OLEDs[3]. Organic TFTs have the advantages of low temperature processing, however, they often show low carrier mobility and poor device stabilities[4-6].

Recently, much attention has been paid to ZnO-based TFTs. ZnO is a non-toxic semiconductor with high electron mobility, excellent environmental stability and high optical transparency (bandgap: 3.3 eV at room temperature)[7-16]. ZnO films can be deposited by variety of deposition techniques, such as sol-gel process, spray pyrolysis, molecular beam epitaxy (MBE), chemical vapor deposition (CVD) and magnetron sputtering[7-16]. ZnO is an ideal semiconductor material for TFT applications, with higher field effect mobility than amorphous silicon and lower deposition temperature than poly-silicon[7-16]. With the increase of the interest in ZnO TFT，many researchers have studied the performance of ZnO TFT. MA et al[9]investigated ZnO TFT with Al drain contact, the leakage current was 1×10-7A, and the field effect mobility was 0.1 cm2/Vs. PARK[10]studied the influence of annealing on SiO2/ZnO TFT, when the annealing temperature was 300 ℃, the device exhibited best performance, the mobility，the threshold voltage andIon/Ioffratio were 0.8 cm2/Vs, 2.5 V, 1×106, respectively. CROSS et al[11]compared the stability and performance of ZnO TFT with SiO2and SiNxdielectric, respectively. The subthreshold slope,Ion/Ioffand the mobility were 1.06 V/Dec, 1×105, and 0.10 to 0.25 cm2/Vs respectively for TFT with SiO2insulators. AHN et al[12]fabricated ZnO-based TFT with Al2O3dielectric. The device was handled with various temperatures. The best performance was found at 250 ℃, the mobility was up to 30 cm2/Vs. VYAS et al[13]had reported optimization techniques of ZnO based thin film transistors, therein the mobility about ZnO TFT by RF sputtering[16]had a wide range of 0.1～2.5 cm2/Vs.

ZnO thin films naturally exhibit n-type conductivity due to the native defects, such as oxygen vacancies (VO) or zinc interstitials (Zni). The high carrier concentration and poor control of defects result in a large negative threshold voltage and large off current[4-5], which is not good for device applications. It has been reported that the conductivity of ZnO thin films could be strongly affected by thermal annealing[4-5]. However, a detailed and systematic study of the influences of thermal annealing on the ZnO thin film and related TFTs is still lacking.

In this study, the performance of ZnO-TFTs with different post-annealing temperatures was intensively investigated by X-ray diffraction (XRD), scanning electron microscope (SEM), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS), and photoluminescence (PL). The improvement of the devices after annealing is attributed to the decrease of carrier concentration, the enhancement of the crystallization of the ZnO, and the improvement semiconductor/dielectric interface. Above all, the ZnO-TFTs with 400 ℃ annealing temperature exhibited the best performance with a mobility of 2.7 cm2/Vs, a threshold voltage of 4.6 V, an on/off current ratio of 5×105, and a subthreshold swing of 0.98 V/Dec.

1 Experimental section

The ZnO-TFT device is a bottom-gate top-contact structure. The heavily doped p-type Si (111) (ρ<0.01 Ω·cm) with a 300 nm thick thermal SiO2were used as both the gate electrode and the dielectric layer. Before depositing the ZnO active layer, the substrates were sonicated with acetone, isopropanol, and deionized water, respectively. The ZnO layer was deposited as the active layer at room temperature by JGP560CШ radio-frequency (RF) magnetron sputtering. The deposition process was carried out under a sputtering pressure of 4 Pa and a RF power of 40 W. The resulting thickness of the ZnO film was about 40 nm, measured by VEECO Dektak 6M Step Profiler. The ZnO thin films were annealed at temperatures ranging from 200 to 500 ℃ for 1 h in air. Subsequently, the Al source and drain electrodes were deposited by thermal evaporation through a shadow mask to form a channel width (W) and length (L) of 800 and 200 μm, respectively. The electrical characteristics of the ZnO-TFTs were measured using a Keithley source meter 2612B in the dark at room temperature.

The field-effect mobility (μ) in the saturation region and the threshold voltage (VTH) are calculated by fitting the straight line to the plot of the square root ofIDSversusVGS, according to the expression:

(1)

whereCox(11.5 nF/cm2),W(800 μm) andL(200 μm) are the capacitance of the gate insulator per unit area, channel width, and channel length, respectively.

The subthreshold swing (S) and the interface trap density (NT) are calculated by the following formulas:

(2)

(3)

whereS,kBandCoxare the subthreshold swing, Boltzmann’s constant and the capacitance of the gate insulator per unit area, respectively.

2 Results and discussion

The output and transfer curves of ZnO-TFTs under different temperatures are shown in the quick response (QR) code at the end of document, with electrical performance summarized in Table 1. As shown in Table 1, the as-deposited ZnO-TFT shows a mobility of 1.0 cm2/Vs, a low on/off current ratio of 8.6×103and a large subthreshold swing of 11.5 V/Dec. The poorIon/Ioffis due to the high carrier concentration of the as-deposited ZnO thin film originated from the native defects, such as oxygen vacancies (VO) or zinc interstitials (Zni). The off current and the devices performance are greatly improved after thermal annealing. The device with 400 ℃ annealing temperature exhibites the best performance with a mobility of 2.7 cm2/Vs, a threshold voltage of 4.6 V, an on/off current ratio of 5×105, and a subthreshold swing of 0.98 V/Dec. However, the device performance becomes poorer when the annealing temperature reaches 500 ℃.

Table 1 The electrical parameters the ZnO-TFTs under different annealing temperatures表1 不同退火溫度ZnO-TFT電學(xué)性能參數(shù)表

Fig.1 XRD spectrum of ZnO films with different annealing temperatures圖1 不同溫度退火ZnO薄膜XRD譜

To understand the effect of thermal annealing on the ZnO thin film and related TFTs, systematical investigations including XRD, PL, and XPS characterization were carried out. Fig.1 shows the XRD patterns of ZnO thin films annealed at different temperatures. All of the films only show the diffraction peak of (002) crystal plane of wurtzite structure. Besides, the peak intensity increases with the rise of annealing temperature, indicating that thecaxis preferred orientation of ZnO thin films is improved. Fig.2 shows the FWHM of the (002) diffraction peak and the grain size of ZnO films with different annealing temperatures, and the grain size of films is calculated by the Scherrer’s formulaD=0.9λ/(βcosθ). With the increase of annealing temperature, the grain size of ZnO thin films increases from 26 nm to 40 nm, suggesting that the crystallization quality of the ZnO films is gradually improved.

Fig.2 FWHM of the (002) diffraction peak and grain size of ZnO films with different annealing temperatures圖2 不同退火溫度ZnO薄膜(002)衍射峰對(duì)應(yīng)的半高寬與晶粒尺寸大小

The surface properties of ZnO films on Si/SiO2substrates were investigated by SEM and AFM. Fig.3 and Fig.4 show the SEM and AFM images of ZnO films under different temperatures. The root mean square (RMS) values are 11.10, 11.10, 2.77, 1.42 and 1.48 nm for the as-deposited, 200, 300, 400 and 500 ℃ annealed films. Both SEM and AFM images reveal the polycrystalline nature of ZnO thin films, consistent with the XRD results. Besides, the ZnO films above 200 ℃ show smooth surface, which is good for carrier transport, as will be discussed in the following sections.

Fig.3 SEM images of ZnO films with different annealing temperatures 圖3 不同退火溫度ZnO薄膜對(duì)應(yīng)SEM圖

Fig.4 AFM images of ZnO films with different annealing temperatures圖4 不同退火溫度ZnO薄膜對(duì)應(yīng)AFM圖

Fig.5 XPS spectrums for the Zn 2p3/2 core level of ZnO thin films圖5 不同退火溫度ZnO薄膜Zn 2p3/2 XPS譜

The change of the defect states in ZnO films after annealing is studied in order to discuss the mechanism for the changes of the electrical properties of the films. Fig.5 shows the XPS spectrums for the Zn 2p3/2 core level of the ZnO thin films. The binding energies of 2p3/2 of all the ZnO thin films are 1 021.6±0.1 eV, higher than the binding energy of the metal zinc state (1 021.1 eV)[17]. So the zinc in the ZnO thin films exists in form of oxidation state, and annealing treatment does not change the chemical state of zinc in the films. This is consistent with the XRD result where no Zn metal phase could be observed. So the electrical performance of the ZnO films after annealing in air is not influenced by the chemical state of the zinc element. Fig.6 shows the core-level XPS spectra of O 1s for ZnO films annealed in different temperatures. Gaussian fitting shows that O 1s core level spectrum can be divided into three peaks: OIfor 530.15±0.15 eV, OIIfor 531.25±0.20 eV, OIIIfor 532.40±0.15 eV. The OIis related to the lattice oxygen of ZnO thin film[18-20]. The OIIis related to the oxygen vacancy (VO) of ZnO[18-20]. The OIIIis corresponding to the absorbed oxygen species (such as -CO3, -OH, H2O and O2) or the oxygen interstitials (Oi) in the films[18-20].

As shown in Fig.7, with the rise of annealing temperature, the relative percentage of OIIdecreases from 21.05% to 12.95%, and the relative percentage of OIIIincreases from 8.77% to 15.83%. Thus, the content of oxygen vacancies in films decreases with the increase of annealing temperature, while the content of adsorption oxygen and oxygen interstitials in ZnO film increase.

PL spectrums analysis is also an important method to study the defect states in oxide semiconductors. Visible luminescence of the deep level is closely related to the defect states in the sample. Fig.8 shows the result after normalization of the emission peaks near band edge. It can be seen all the samples show emission band near 600 nm. It was suggested that the emission band near 600 nm was related to the interstitial oxygen Oiin ZnO thin films[21-22].

Fig.6 XPS spectrum for the O 1s core level of ZnO thin films and the Gaussian fitting results.圖6 ZnO薄膜O 1s芯能級(jí)XPS譜和高斯擬合結(jié)果

Fig.7 Amount change of the three different chemical states of O圖7 三種不同化學(xué)態(tài)O的比例變化

Fig.8 PL spectrums for the ZnO films with different annealing temperatures圖8 不同退火溫度ZnO薄膜PL譜圖

With the increase of annealing temperature, the luminous intensity in orange and red regions gradually increases, indicating that the content of interstitial oxygen (Oi) in ZnO films increases with the annealing temperature. According to the XPS and PL characterization，when the annealing temperature is 500 ℃, the content of defects in the ZnO film，such as absorbed oxygen and interstitial oxygen, is too much, and the trapping and scattering of carriers in the conductive channel is too strong.

For polycrystalline ZnO, carriers can get scattered at a grain boundary. If the mean free path (MFP) in the single crystal is much larger than the size of the grains in ZnO, then we could assume that the MFP is equal to the grain size,lG. The average momentum relaxation time can be estimated as[21]

(4)

So a grain size scattering limited mobility can then be written as

(5)

whereqis elementary charge.μGSSincreases with the increase of grain size.

Besides, we have to account for mobility degradation because of an energy barrier introduced by a grain boundary. The boundary can be considered to be a back-to-back Schottky barrier and form an inter-grain transport perspective. Electron transport between grains will be inhibited by the energy barrier indicated asEB(Fig.9), which could be expressed as[21]

whereqNGBis the negative charge trapped at the grain boundary, which will be balanced by positive charge associated with donor dopingqNDin the depletion region surrounding the grain boundary,εSis the low-frequency (static) dielectric constant,NDis the concentration of donor imputity.

Electron transport in a polycrystalline material is also dominated by inter-grain transit involving thermionic emission over the energy barrierEBand could be expressed as

whereμ0is the zero-barrier mobility.

For low doping concentration,EBis large so thatμEBis small because electrons within a grain cannot surmount the inter-grain energy barrier. As the doping concentration increases, theEBdecreases so thatμEBwill increase.

The overall bulk mobility in a polycrystalline materialμis obtained from summing in an inverse fashion grain size scattering mobilityμGSSand energy barrier degradation mobilityμEB. The mobility could be expressed as[22]

μ-1=μGSS-1+μEB-1

(6)

So the bulk mobility of ZnO increases with grain size and doping concentration.

Fig.9 Energy band diagram model for an n-type polycrystalline material, in which EB denotes an barrier height, ET denotes the energy of grain-boundary trap, which is assumed to be discrete and acceptor-like圖9 用于n型多晶材料的能帶圖模型，EB表示勢(shì)壘高度，ET表示晶界陷阱的能量

The XPS and PL results showed that with the increase of annealing temperature, the percent content of oxygen vacancy (VO) in ZnO thin films decrease and the content of absorbed oxygen species or oxygen interstitials (Oi) increase. It was reported that the negatively charged oxygen species absorbed on the films’ surface will form depletion regions, that is, the barrier height near the grain boundary surfaces. The oxygen species at the surface act as acceptors and remove electrons from the bulk to deplete the grains and reduce electron concentrations[24, 26-28]. And the interstitial oxygen (Oi) is acceptor defects in ZnO films, their compensating effect can also induce the decrease in electron concentrations[16,18-20]. So the carrier concentration in ZnO active layer decreases after air annealing.

From the mobility model described above, the bulk mobility of ZnO is the competition between grain sizes and carrier concentration. The mobility of ZnO increases with grain size and doping concentration. From the XRD results, it is suggested that the grain sizes of ZnO thin films get larger with the rise of annealing temperature. On the other hand, from XPS and PL results, the carrier concentration decreases with annealing temperature. Besides, the surface and interface roughness will also cause mobility degradation. From the AFM results, the ZnO films annealed at 300—400 ℃ exhibit smooth roughness, which is good for carrier transport. So the ZnO devices annealed at 300—400 ℃ show the largest mobility because of large grain size, relatively high carrier concentration and smooth surface/interface.

As shown in Table 1, the as-deposited, 200 ℃, 300 ℃, 400 ℃ and 500 ℃ annealed TFTs show interface trap density of 1.1×1013, 5.9×1012, 4.0×1012, 9.5×1011, and 1.2×1013cm-2·eV-1, respectively (calculated from the subthreshold swing, see experimental section). Therefore, the ZnO-TFTs after annealing treatment (200 to 400 ℃ ) not only effectively reduce the carrier concentration and improve the crystalline quality of the ZnO thin films, but also reduce the interface trap density between the active layer and the insulating layer. However, as the annealing temperature further increases to 500 ℃, the device performance gets worse, which is related to the increase of dielectric/semiconductor interface trap density. The best performance of the ZnO-TFTs annealed at 400 ℃ is attributed to the decrease of carrier concentration, the enhancement of the crystallization of the ZnO films and the improvement of interface between the active layer and the insulation layer.

Further improvement of the device performance could be achieved by optimization of the channel thickness, the microstructure of ZnO, and the introduction of passivation layer[4-5]. Besides, the performance improvement could also be realized by some novel post-processing treatments, such as high pressure annealing, microwave annealing, plasma treatment, O3annealing and deep-ultraviolet photochemical activation[6-7].

3 Conclusions

In summary, the properties of ZnO thin films and related TFTs under different post-annealing temperatures (from room temperature to 500 ℃) were intensively investigate by various characterization techniques including XRD, XPS, PL and electrical measurements. The ZnO-TFTs annealed at 400 ℃ exhibite the best performance with a mobility of 2.7 cm2/Vs, a threshold voltage of 4.6 V, an on/off current ratio of 5×105and a subthreshold swing of 0.98 V/Dec. The improvement of the devices is attributed to the decreasing carrier concentration, the enhancement of the crystallization of the ZnO films, and the improvement of interface between the active layer and the insulation layer.