姚亞峰 徐洋洋 侯強(qiáng) 鐘梁
摘? ?要:為了對(duì)流水線結(jié)構(gòu)的坐標(biāo)旋轉(zhuǎn)數(shù)字計(jì)算(Coordinate Rotation Digital Computer,CORDIC)的實(shí)現(xiàn)時(shí)延和硬件資源消耗進(jìn)行優(yōu)化,提出一種僅基于查找表的新的實(shí)現(xiàn)方法,完全免除了迭代運(yùn)算.該方法只需要一個(gè)較低容量的ROM表,以及對(duì)ROM表輸出結(jié)果進(jìn)行簡(jiǎn)單的移位運(yùn)算,即可得到高精度的正弦波或余弦波輸出.分別在Matlab、Modelsim以及XILINX ISE進(jìn)行了理論仿真及實(shí)際驗(yàn)證,結(jié)果表明:這種CORDIC實(shí)現(xiàn)方法只需要2個(gè)時(shí)鐘周期的處理延時(shí),硬件資源消耗與其他實(shí)現(xiàn)方法相比也有所降低,最大工作頻率也有一定提高.
關(guān)鍵詞:坐標(biāo)旋轉(zhuǎn)數(shù)字計(jì)算;流水線結(jié)構(gòu);查找表;可編程邏輯門陣列;數(shù)字信號(hào)處理
中圖分類號(hào):TN492;TN911.72? ? ? ? ? ? ? ? 文獻(xiàn)標(biāo)志碼:A
Implement of CORDIC Algorithm with a Small Capacity ROM Table
YAO Yafeng,XU Yangyang,HOU Qiang,ZHONG Liang
(School of Mechanical Engineering and Electronic Information,China University of Geosciences,Wuhan 430074,China)
Abstract: In order to optimize the implementation delay and hardware resource consumption of the Coordinate Rotation Digital Computer(CORDIC) in pipeline architecture,a new implementation method based on look-up table was proposed,which completely eliminated the iterative computation. This method requires only a lower capacity ROM table,as well as a simple shift operation on the output of the ROM table,so that sine wave or cosine wave output with high accuracy can be obtained. Theoretical simulation and practical verification were carried out in Matlab,Modelsim and XILINX ISE,and the results show that this method of CORDIC only requires two clock cycles of processing delay,and the hardware resource consumption is also reduced when compared with other methods. Additionally,the circuit output accuracy and maximum working frequency are also improved at a certain level.
Key words: coordinate rotation digital calculation(CORDIC); pipeline architecture; look-up table;
programmable logic gate array; digital signal processing
CORDIC(Coordinate Rotation Digital Computer)算法核心思想是通過迭代來不斷逼近目標(biāo)值,其精度可以通過迭代次數(shù)來控制,具有輸出結(jié)果精度可調(diào)、硬件實(shí)現(xiàn)簡(jiǎn)單等特點(diǎn)[1],方便實(shí)現(xiàn)坐標(biāo)變換、三角函數(shù)計(jì)算、矩陣運(yùn)算等多種數(shù)字信號(hào)處理功能,在直接數(shù)字頻率合成器DDS、數(shù)字控制振蕩器NCO、快速傅里葉變換FFT等領(lǐng)域都得到廣泛應(yīng)用.
隨著現(xiàn)代通信技術(shù)不斷更新發(fā)展,通信系統(tǒng)對(duì)CORDIC算法實(shí)現(xiàn)要求也在不斷提高[2-3].近年來,有關(guān)CORDIC算法的高效實(shí)現(xiàn)一直得到人們持續(xù)關(guān)注和研究.文獻(xiàn)[4]提出的實(shí)現(xiàn)方法雖然有很高的相位分辨率,但是其最大工作頻率受到限制并且功耗較大.文獻(xiàn)[5]提出的表驅(qū)動(dòng)縮小目標(biāo)旋轉(zhuǎn)角度的方法雖然迭代次數(shù)有所減少,但是其硬件資源消耗和最大輸出時(shí)延仍然較大.文獻(xiàn)[6-7]提出的固定角度旋轉(zhuǎn)CORDIC算法利用混合旋轉(zhuǎn)CORDIC算法原理進(jìn)行一次角度估計(jì)和多次單向角度旋轉(zhuǎn),雖然減少了迭代次數(shù),但同時(shí)也降低了精度.文獻(xiàn)[8-9]提出的雙步旋轉(zhuǎn)方法雖然免去了校正因子,減少了迭代次數(shù),但是該方法硬件結(jié)構(gòu)比較復(fù)雜,硬件資源消耗仍然較大.文獻(xiàn)[10-11]提出將整個(gè)迭代過程分為三個(gè)階段完成:第一階段查找4位地址的查找表;第二階段進(jìn)行4次蝶形迭代運(yùn)算;第三階段通過合并運(yùn)算得出輸出結(jié)果.這種典型的實(shí)現(xiàn)方法在運(yùn)算速度、計(jì)算精度和電路資源消耗等方面都有一定改善,但是需要7個(gè)時(shí)鐘周期的延時(shí)才能得到輸出結(jié)果,不太適合高速、實(shí)時(shí)的信號(hào)處理與應(yīng)用.
本文在文獻(xiàn)[10-11]的基礎(chǔ)上,提出一種只基于查找表的新的實(shí)現(xiàn)方法,完全免除了迭代運(yùn)算.這種實(shí)現(xiàn)方法只需要一個(gè)6位地址輸入的小容量ROM表,然后對(duì)查表輸出的結(jié)果采用簡(jiǎn)單的移位和相加運(yùn)算進(jìn)行結(jié)果修正,即可得到滿足特定精度要求的正弦波或余弦波輸出.這種實(shí)現(xiàn)方法在電路資源消耗沒有增加,輸出精度保持一致的前提下,輸出延時(shí)從7個(gè)時(shí)鐘周期縮短為2個(gè)時(shí)鐘周期,尤其適合實(shí)時(shí)性要求高、處理速度快的應(yīng)用場(chǎng)合.